Abstract:
This paper enumerates low power design of BILBO(Built-In-Logic-Block-Observer)usingBasic 5T-TSPC clocked latch and 5T-TSPC(MTCMOS) clocked latch.The clocked latches are basic building block to design the BILBO.The clocked latches consumes more power in the total power consumption of the BILBO.The power efficient 5T-TSPC(MTCMOS) clocked latch is designed from the Basic 5T-TSPC clocked latch.The BILBO is designed by using both Basic 5T-TSPC clocked latch and 5T-TSPC (MTCMOS) clocked latch.The design of BILBO by using 5T-TSPC(MTCMOS) consumes less power.The performance of BILBO is analyzed in terms of Number Of Transistors(NT),NumberOfClockedTransistors(NC), Power(P),Area(A).
Keywords: Clocked Latch (Flip-flop), BILBO, Low power, Area